Verilog

Verilog, standardized as IEEE 1364, is a hardware description language (HDL) used to model electronic systems. It is most commonly used in the design and verification of digital circuits at the register-transfer level of abstraction. It is also used in the verification of analog circuits and mixed-signal circuits.

Read more about Verilog:  Overview, Example, Definition of Constants, Synthesizeable Constructs, Initial and Always, Fork/join, Race Conditions, Operators, Four-valued Logic, System Tasks, Program Language Interface (PLI), Simulation Software