Verilog - System Tasks

System Tasks

System tasks are available to handle simple I/O, and various design measurement functions. All system tasks are prefixed with $ to distinguish them from user tasks and functions. This section presents a short list of the most often used tasks. It is by no means a comprehensive list.

• $display - Print to screen a line followed by an automatic newline.
• $write - Write to screen a line without the newline.
• $swrite - Print to variable a line without the newline.
• $sscanf - Read from variable a format-specified string. (*Verilog-2001)
• $fopen - Open a handle to a file (read or write)
• $fdisplay - Write to file a line followed by an automatic newline.
• $fwrite - Write to file a line without the newline.
• $fscanf - Read from file a format-specified string. (*Verilog-2001)
• $fclose - Close and release an open file handle.
• $readmemh - Read hex file content into a memory array.
• $readmemb - Read binary file content into a memory array.
• $monitor - Print out all the listed variables when any change value.
• $time - Value of current simulation time.
• $dumpfile - Declare the VCD (Value Change Dump) format output file name.
• $dumpvars - Turn on and dump the variables.
• $dumpports - Turn on and dump the variables in Extended-VCD format.
• $random - Return a random value.