History
Intel initiated IBIS in the early 1990s. Intel needed to have all of its divisions to present a common standardized model format to its external customers. This prompted Intel to solicit EDA vendors to participate in the development of a common model format. The first IBIS model, version 1.0, was aimed at describing CMOS circuits and TTL I/O buffers.
As IBIS evolved with the participation of more companies and industry members, an IBIS Open Forum was created to promote the application of IBIS as a simulation tool format and to make sure that a standard exists. Many semiconductor vendors supply IBIS models and many EDA vendors sell IBIS-compliant software tools. In 1995 the IBIS Open Forum teamed with the American National Standards Institute/Electronic Industries Alliance (ANSI/EIA). IBIS version 2.1 was the first version released by the new alliance. It added the ability to simulate ECL and PECL buffers as well as differential lines. IBIS 3.2 allows for a package model description along with an electrical board description. IBIS Version 5.0 was ratified by the IBIS Open Forum on August 29, 2008. Compared to the previous version (IBIS 4.2, ANSI/EIA-656-B), it adds a new flow based not on SPICE transient but on a channel simulator (called algorithmic model application program interface or AMI flow), power integrity, and EMC checking features. For power integrity, it uses Touchstone 2.0 S-parameter files with per-port reference impedance specification.
Today the IBIS Open Forum is an official subcommittee of TechAmerica.
Read more about this topic: Input/output Buffer Information Specification
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