Input/output Buffer Information Specification

Input/output Buffer Information Specification or IBIS is a method for integrated circuit vendors to provide information about the input/output buffers of their product to their prospective customers without revealing the intellectual property of their implementation and without requiring proprietary encryption keys. The model is generated in text format and consists of a number of tables that captures current vs. voltage (IV) and voltage vs. time (Vt) characteristics of the buffer, as well as the values of certain parasitic components. It is a standard data exchange format for exchanging modeling information among semiconductor device suppliers, simulation software suppliers, and end users.

IBIS models are generally used in lieu of SPICE models, to perform various board level signal integrity (SI) simulations and timing analyses. IBIS models could be used to verify signal integrity requirements, especially for high speed products.

Read more about Input/output Buffer Information Specification:  History, Evolution

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