Instruction Set Overview
Instructions had short (one-word) and long (two-word) formats. Most computational, load, and store instructions referenced one register (usually ACC) and a memory location. The memory location was identified, in the short format, by an 8-bit signed displacement from either the current address or one of the index registers; or in the long format, by a full 15-bit address, which could be indexed and/or specify indirection.
Most conditional transfers were based on condition indicators as set by a preceding operation, usually reflecting the contents of ACC. Transfers could be by skip (which assumed that the next instruction was short) or by branch.
Main Registers: IAR = Instruction Address Register ACC = Accumulator EXT = Extension Register XRx = Index Registers: x = 1,2,3 Implemented as memory words 1,2,3, not as hardware registers. Condition indicators + Positive - Negative Z Zero O Overflow C Carry E Even 1130 Instruction Set Mnemonics: LD = Load ACC STO = Store ACC LDD = Load Double (ACC & EXT) STD = Store Double (ACC & EXT) LDX = Load Index STX = Store Index LDS = Load Status STS = Store Status A = Add ACC AD = Add Double S = Subtract ACC SD = Subtract Double M = Multiply D = Divide AND = Boolean And OR = Boolean Or XOR = Boolean Exclusive Or SLA = Shift Left ACC SLT = Shift Left ACC & EXT SLCA = Shift Left and Count ACC SLC = Shift Left and Count ACC & EXT SRA = Shift Right ACC SRT = Shift Right ACC & EXT RTE = Rotate Right ACC & EXT XCH = Exchange ACC and EXT MDM = Modify Memory B = Branch BSC = Branch or Skip on Condition (Modifier dependent) i.e. BP BNP BN BNN BZ BNZ BC BO BOD BSI = Branch and Store IAR MDX = Modify Index and Skip (Increment IAR one if a sign change or becomes zero) WAIT = Halt NOP = No Operation XIO = Execute I/O 1800 Additional Instruction Mnemonics: CMP = Compare ACC DCM = Double Compare ACC & EXT Short instruction format (one 16 bit word): 1 Bits 0...45678......5 OP---FTTDisp---- OP is Operation F is format 0 = Short TT is Tag Disp is Displacement Long instruction format (two 16 bit words): 1 1 Bits 0...456789.....50..............5 OP---FTTIMod----Address--------- OP is Operation F is format 1 = Long TT is Tag I is Indirect bit Mod is Modifier Effective Address Calculation (EA): F = 0 | F = 1, I = 0 | F = 1, I = 1 Direct Addressing| Direct Addressing| Indirect Addressing ------------------------------------------------------------------- TT = 00 | EA = Displ + IAR | EA = Add | EA = C/Add TT = 01 | EA = Displ + XR1 | EA = Add + XR1 | EA = C/Add + XR1 TT = 10 | EA = Displ + XR2 | EA = Add + XR2 | EA = C/Add + XR2 TT = 11 | EA = Displ + XR3 | EA = Add + XR2 | EA = C/Add + XR3 ------------------------------------------------------------------- Disp = Contents of displacement field Add = Contents of address field of instruction C = Contents of location specified by Add or Add + XR- Reserved memory
The lowest addresses of core memory had uses dictated either by the hardware or by convention:
Address | Usage |
---|---|
/0000 | By convention, contained the instruction B *-1 , which would branch to itself indefinitely until an operator noticed that all the console IAR lights were dark and flushed the job, either by pressing Int Req or by rebooting. |
/0001 | XR1. The memory addresses of the index registers permitted direct moves between them, such as with LDX I1 2 |
/0002 | XR2. |
/0003 | XR3. |
/0008 | The address of the handler for the Level 0 (highest priority) interrupt: the card reader "column ready" interrupt. |
/0009 | The address of the handler for the Level 1 interrupt, usually the 1132 printer. Handlers for this and lower interrupts would have to test a Status Word to determine which device had interrupted. |
/000A=10 | The address of the handler for the Level 2 interrupt. |
/000B=11 | The address of the handler for the Level 3 interrupt. |
/000C=12 | The address of the handler for the Level 4 interrupt. |
/000D=13 | The address of the handler for the Level 5 (lowest priority) interrupt. |
/0020=32 | First word of the scan field for the 1132 printer. |
/0026=38 | Last full word of the scan field. |
/0027=39 | Half used: 120 columns = 120 bits = seven 16-bit words plus 8 bits. |
Read more about this topic: IBM 1130
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