Consider an npn transistor circuit. During the positive half-cycle of the signal, the base is positive with respect to the emitter and hence the base-emitter junction is forward biased. This causes a base current and much larger collector current to flow. The positive half-cycle of the signal is amplified in the collector. During the negative half-cycle, the base-emitter junction is reverse biased and hence no current flows. No output flows during the negative half-cycle of the signal. Thus the positive-only amplified output is unfaithful.
A sufficent battery source in the base circuit keeps the input circuit forward biased even during the peak of the negative half-cycle. When no signal is applied, a DC current I C will flow in the collector circuit due to the battery. This is known as zero signal collector current.
The value of zero signal collector current should be at least equal to the maximum collector current due to AC signal alone.
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