Machine Architecture
In a Turing-complete model, each memory location can store an arbitrary integer, and – depending on the model – there may be arbitrarily many locations. The instructions themselves reside in memory as a sequence of such integers.
There exists a class of universal computers with one instruction based on bit manipulation such as bit copying or bit inversion. Since their memory model is the same as the memory structure used in real computers, those bit manipulation machines are equivalent to real computers rather than to Turing machines.
Currently known OISC can be roughly separated into three broad categories:
- Transport Triggered Architecture Machines
- Bit Manipulating Machines
- Arithmetic Based Turing-Complete Machines
Transport Triggered Architecture (TTA) is a design in which computation is a side effect of data transport. Usually some memory registers (triggering ports) within common address space, perform an assigned operation when the instruction references them. For example, in an OISC utilizing a single memory-to-memory copy instruction, this is done by triggering ports that perform arithmetic and instruction pointer jumps when written to.
Bit Manipulating Machines are the simplest class. A bit copying machine, called BitBitJump, copies one bit in memory and passes the execution unconditionally to the address specified by one of the operands of the instruction. This process turns out to be capable of universal computation (i.e. being able to execute any algorithm and to interpret any other universal machine) because copying bits can conditionally modify the code that will be subsequently executed. Another machine, called the Toga computer, inverts a bit and passes the execution conditionally depending on the result of inversion. Yet another bit operating machine, similar to BitBitJump, copies several bits at the same time. The problem of computational universality is solved in this case by keeping predefined jump tables in the memory.
Arithmetic Based Turing-complete Machines use an arithmetic operation and a conditional jump. Unlike the two previous classes which are universal computers, this class is universal and Turing-complete in its abstract representation. The instruction operates on integers which may also be addresses in memory. Currently there are several known OISCs of this class, based on different arithmetic operations: addition (Addleq), decrement (DJN), increment (P1eq), and subtraction (Subleq). The latter is the oldest, the most popular and, arguably, the most efficient.
Read more about this topic: One Instruction Set Computer
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