High-level Synthesis or Behavioral Synthesis
With a goal of increasing designer productivity, research efforts on the synthesis of circuits specified at the behavioral level have led to the emergence of commercial solutions in 2004, which are used for complex ASIC and FPGA design. These tools automatically synthesize circuits specified at C level to a register transfer level (RTL) specification, which can be used as input to a gate-level logic synthesis flow. Today, high-level synthesis, also known as ESL synthesis and behavioral synthesis, essentially refers to circuit synthesis from high level Languages like ANSI C/C++ or SystemC etc., whereas Logic Synthesis refers to synthesis from structural or functional description to RTL.
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Famous quotes containing the word synthesis:
“It is not easy to construct by mere scientific synthesis a foolproof system which will lead our children in a desired direction and avoid an undesirable one. Obviously, good can come only from a continuing interplay between that which we, as students, are gradually learning and that which we believe in, as people.”
—Erik H. Erikson (20th century)