Interleaved memory is a technique for compensating the relatively slow speed of DRAM. The CPU can access alternative sections immediately without waiting for memory to be cached. Multiple memory banks take turns supplying data. An interleaved memory with "n" banks is said to be n-way interleaved. If there are "n" banks, memory location "i" would reside in bank number .
Main memory is composed of a collection of DRAM memory chips. A number of chips can be grouped together to form a memory bank. It is possible to organize the memory banks in a way is known as interleaved memory.
One way of allocating virtual addresses to memory modules is to divide the memory space into contiguous blocks. The CPU can access alternate sections immediately, without waiting for memory to catch up (through wait states). Interleaved memory is one technique for compensating for the relatively slow speed of dynamic RAM (DRAM). Other techniques include page-mode memory and memory caches.
Interleaved memories are the implementation of the concept of accessing more words in a single memory access cycle. This can be achieved by partitioning the memory e.g. into N separate memory modules. Thus, N accesses can be carried out to the memory simultaneously.
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“I hope there will be no effort to put up a shaft or any monument of that sort in memory of me or of the other women who have given themselves to our work. The best kind of a memorial would be a school where girls could be taught everything useful that would help them to earn an honorable livelihood; where they could learn to do anything they were capable of, just as boys can. I would like to have lived to see such a school as that in every great city of the United States.”
—Susan B. Anthony (1820–1906)