In CPU design, a Sum Addressed Decoder or Sum Addressed Memory (SAM) Decoder is a method of reducing the latency of the CPU cache access. This is achieved by fusing the address generation sum operation with the decode operation in the cache SRAM.
Read more about Sum Addressed Decoder: Overview, Sum-addressed Cache: Collapse The Adder and Decoder, Ignoring The LSBs: Late Select On Carry, Match Generation, Gate Level Implementation, What Has Been Saved?, Further Optimizations: Predecode
Famous quotes containing the words sum and/or addressed:
“No, the five hundred was the sum they named
To pay the doctor’s bill and tide me over.
It’s that or fight, and I don’t want to fight
I just want to get settled in my life....”
—Robert Frost (1874–1963)
“The line of separation was very distinct, and the Indian immediately remarked, “I guess you and I go there,—I guess there’s room for my canoe there.” This was his common expression instead of saying “we.” He never addressed us by our names, though curious to know how they were spelled and what they meant, while we called him Polis. He had already guessed very accurately at our ages, and said that he was forty-eight.”
—Henry David Thoreau (1817–1862)