In CPU design, a Sum Addressed Decoder or Sum Addressed Memory (SAM) Decoder is a method of reducing the latency of the CPU cache access. This is achieved by fusing the address generation sum operation with the decode operation in the cache SRAM.
Read more about Sum Addressed Decoder: Overview, Sum-addressed Cache: Collapse The Adder and Decoder, Ignoring The LSBs: Late Select On Carry, Match Generation, Gate Level Implementation, What Has Been Saved?, Further Optimizations: Predecode
Famous quotes containing the words sum and/or addressed:
“The ornament is a statuette, a black figure of a bird. I am prepared to pay on behalf of the figure’s rightful owner the sum of $5000 for its recovery. I am prepared to promise, to promise ... what is the phrase?—’No questions will be asked.’”
—John Huston (1906–1987)
“A guide book is addressed to those who plan to follow the traveler, doing what he has done, but more selectively. A travel book, in its purest, is addressed to those who do not plan to follow the traveler at all, but who require the exotic or comic anomalies, wonders and scandals of the literary form romance which their own place or time cannot entirely supply.”
—Paul Fussell (b. 1924)