In CPU design, a Sum Addressed Decoder or Sum Addressed Memory (SAM) Decoder is a method of reducing the latency of the CPU cache access. This is achieved by fusing the address generation sum operation with the decode operation in the cache SRAM.
Read more about Sum Addressed Decoder: Overview, Sum-addressed Cache: Collapse The Adder and Decoder, Ignoring The LSBs: Late Select On Carry, Match Generation, Gate Level Implementation, What Has Been Saved?, Further Optimizations: Predecode
Famous quotes containing the words sum and/or addressed:
“The more elevated a culture, the richer its language. The number of words and their combinations depends directly on a sum of conceptions and ideas; without the latter there can be no understandings, no definitions, and, as a result, no reason to enrich a language.”
—Anton Pavlovich Chekhov (1860–1904)
“Poor old Jonathan Bing
Went home and addressed a short note to the King:
If you please will excuse me
I won’t come to tea;
For home’s the best place for
All people like me!”
—Beatrice Curtis Brown (1901–1974)