Explicit Data Graph Execution, or EDGE, is an instruction set architecture (ISA) which intends to greatly improve computing performance compared to common processors like the Intel x86 line. EDGE combines many individual instructions into a larger group known as a "hyperblock" which can be easily run in parallel. Parallelism of modern CPU designs generally starts to plateau at about eight internal units and from one to four "cores", EDGE designs intend to support hundreds of internal units and offer processing speeds hundreds of times greater than existing designs. Major development of the EDGE concept has been led by the University of Texas at Austin under DARPA's Polymorphous Computing Architectures program, with the goal of producing a single-chip CPU design with 1 TFLOPS performance by 2012.
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