VAX 6000 Model 2x0
- (Previously known as the VAX 62x0)
- Code named "Calypso"
- Introduced in 19 April 1988
- One to four 12.5 MHz (80 ns cycle time) CVAX chip set(s), each with an external 256 KB of secondary cache built from 160 ns SRAM
- (The number of chip sets present determined the value of "x").
- Maximum of 256 MB of ECC memory
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—Lawrence Balter (20th century)