Tube (BBC Micro) - Implementation

Implementation

The 40-pin IDC "Tube" connector was a simple slave connection to the host processor's main bus, with 8 data lines, 7 address lines, and an interrupt input. The Tube protocols were implemented by hardware in the attached device.

Inside the coprocessor unit a proprietary chip (the Tube ULA, initially developed by Ferranti) interfaced and logically isolated the host and coprocessor buses. This allowed the Tube to work with a completely different bus architecture in the coprocessor unit. The only other active components needed were a microprocessor, some RAM, a small ROM containing processor specific client code, glue logic such as an address decoder and a power supply.

The two processors communicated through four pairs of FIFO buffers in the Tube ULA. Console input/output, error messages, data transfers and system calls each had their own pair of buffers, one for each direction. The queue capacity varied between 1 and 24 bytes, depending on the dedicated buffer function. Each buffer had a control register and status register to monitor its state and configure the raising of interrupts.

The protocol for the use of these buffers was rigorously specified by Acorn Computers and amounts to interprocess communication by message passing. Most interaction was asynchronous but fast block transfers were synchronous and consisted of the host blindly running a simple fetch-store loop, which defined the transfer rate. The coprocessor was synchronised by passing a dummy byte and then regulated by the relevant buffer semaphore.

The general-purpose nature of the Tube connector in principle allowed it to be used for any type of high-speed peripheral, although Acorn only used it for Tube coprocessors. The BBC Micro/Master range provided 5 address lines for the address range &60–&7F but the Tube protocol only used the lowest 3 bits. Only these 3 address lines are connected to internal Tube sockets, as found in the BBC Master or Universal Second Processor Unit.