Serial Peripheral Interface Bus - Standards

Standards

The SPI bus is a de facto standard. However, the lack of a formal standard is reflected in a wide variety of protocol options. Different word sizes are common. Every device defines its own protocol, including whether or not it supports commands at all. Some devices are transmit-only; others are receive-only. Chip selects are sometimes active-high rather than active-low. Some protocols send the least significant bit first.

Some devices even have minor variances from the CPOL/CPHA modes described above. Sending data from slave to master may use the opposite clock edge as master to slave. Devices often require extra clock idle time before the first clock or after the last one, or between a command and its response. Some devices have two clocks, one to read data, and another to transmit it into the device. Many of the read clocks run from the chip select line.

Some devices require an additional flow control signal from slave to master, indicating when data are ready. This leads to a 5-wire protocol instead of the usual 4. Such a ready or enable signal is often active-low, and needs to be enabled at key points such as after commands or between words. Without such a signal, data transfer rates may need to be slowed down significantly, or protocols may need to have dummy bytes inserted, to accommodate the worst case for the slave response time. Examples include initiating an ADC conversion, addressing the right page of flash memory, and processing enough of a command that device firmware can load the first word of the response. (Many SPI masters don't support that signal directly, and instead rely on fixed delays.)

Many SPI chips only support messages that are multiples of 8 bits. Such chips can not interoperate with the JTAG or SGPIO protocols, or any other protocol that requires messages that are not multiples of 8 bits.

There are also hardware-level differences. Some chips combine MOSI and MISO into a single data line (SI/SO); this is sometimes called three-wire signaling (in contrast to normal four-wire SPI). Another variation of SPI removes the chip select line, managing protocol state machine entry/exit using other methods; this isn't usually called three-wire though. Anyone needing an external connector for SPI defines their own: UEXT, JTAG connector, Secure Digital card socket, etc. Signal levels depend entirely on the chips involved.

Read more about this topic:  Serial Peripheral Interface Bus

Famous quotes containing the word standards:

    There are ... two minimum conditions necessary and sufficient for the existence of a legal system. On the one hand those rules of behavior which are valid according to the system’s ultimate criteria of validity must be generally obeyed, and on the other hand, its rules of recognition specifying the criteria of legal validity and its rules of change and adjudication must be effectively accepted as common public standards of official behavior by its officials.
    —H.L.A. (Herbert Lionel Adolphus)

    If one doesn’t know one’s own country, one doesn’t have standards for foreign countries.
    Johann Wolfgang Von Goethe (1749–1832)

    Chief among our gains must be reckoned this possibility of choice, the recognition of many possible ways of life, where other civilizations have recognized only one. Where other civilizations give a satisfactory outlet to only one temperamental type, be he mystic or soldier, business man or artist, a civilization in which there are many standards offers a possibility of satisfactory adjustment to individuals of many different temperamental types, of diverse gifts and varying interests.
    Margaret Mead (1901–1978)