Some Examples
| Architecture | Integer registers |
FP registers |
|---|---|---|
| x86-32 | 8 | 8 |
| x86-64 | 16 | 16 |
| IBM/360 | 16 | 4 |
| z/Architecture | 16 | 16 |
| Itanium | 128 | 128 |
| SPARC | 32 | 32 |
| IBM Cell | 4~16 | 1~4 |
| IBM POWER | 32 | 32 |
| Alpha | 32 | 32 |
| 6502 | 3 | 0 |
| W65C816S | 5 | 0 |
| PIC microcontroller | 1 | 0 |
| AVR microcontroller | 32 | 0 |
| ARM 32-bit | 16 | varies |
| ARM 64-bit | 31 | 32 |
| MIPS | 32 | 32 |
The table shows the number of registers of several mainstream architectures. Note that in x86-compatible processors the stack pointer (ESP) is counted as an integer register, even though there are a limited number of instructions that may be used to operate on its contents. Similar caveats apply to most architectures.
x86 FPUs have 8 80-bit stack levels in legacy mode, and at least 8 128-bit XMM registers in SSE modes.
Although all of the above listed architectures are different, almost all are a basic arrangement known as the Von Neumann architecture, first proposed by the Hungarian mathematician John von Neumann.
Read more about this topic: Processor Register
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