PowerPC 7450
The PowerPC 7450 "Voyager"/"V'ger" was the only major redesign of the G4 processor. The 33-million transistor chip extended significantly the execution pipeline of 7400 (7 vs. 4 stages minimum) to reach higher clock speeds, improved instruction throughput (3 + branch vs. 2 + branch per cycle) to compensate for higher instruction latency, replaced an external L2 cache (up to 2 MB 2-way set associative, 64-bit data path) with an integrated one (256 KB 8-way set associative, 256-bit data path), supported an external L3 cache (up to 2 MB 8-way set associative, 64-bit data path), and featured many other architectural advancements. The AltiVec unit was improved with the 7450; instead of executing one vector permute instruction and one vector ALU (simple int, complex int, float) instruction per cycle like 7400/7410, the 7450 and its Motorola/Freescale-followers can execute two arbitrary vector instructions simultaneously (permute, simple int, complex int, float). It was introduced with the 733 MHz Power Mac G4 on 9 January 2001. Motorola followed with an interim release, the 7451, codenamed "Apollo 6", just like the 7455.
The enhancements to the 745x design gave it the nicknames G4e or G4+ but these were never official designations.
Read more about this topic: PowerPC G4