Logic Synthesis For Low Power
Logic synthesis can also be optimized in many ways to keep power consumption under control. Details of the following steps can have a significant impact on power optimization:
- Clock gating
- Logic Factorization
- Don’t Care Optimization
- Path Balancing
- Technology Mapping
- State Encoding
- Finite-State Machine Decomposition
- Retiming
Read more about this topic: Power Optimization (EDA)
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