Performance
All instructions execute in two clock cycles, making performance of the core instruction set deterministic. Interrupt response is not more than five clock cycles. As a resource optimization, it is possible for two PicoBlaze cores to share the same 1k x 18 instruction PROM, taking advantage of the dual-ported implementation of this block on Xilinx FPGAs.
Read more about this topic: Pico Blaze
Famous quotes containing the word performance:
“Just as the performance of the vilest and most wicked deeds requires spirit and talent, so even the greatest demand a certain insensitivity which under other circumstances we would call stupidity.”
—G.C. (Georg Christoph)