Physical verification is a process whereby an IC layout design is checked via EDA software tools to see if it meets certain criteria. Verification involves DRC (Design rule check), LVS (Layout versus schematic), ERC (Electrical Rule Check), XOR (Exclusive OR), and Antenna Checks.
Read more about Physical Verification: XOR Check, Antenna Check, ERC (Electrical Rule Check)
Famous quotes containing the words physical and/or verification:
“Our own physical body possesses a wisdom which we who inhabit the body lack. We give it orders which make no sense.”
—Henry Miller (1891–1980)
“A fact is a proposition of which the verification by an appeal to the primary sources of our knowledge or to experience is direct and simple. A theory, on the other hand, if true, has all the characteristics of a fact except that its verification is possible only by indirect, remote, and difficult means.”
—Chauncey Wright (1830–1875)