Physical verification is a process whereby an IC layout design is checked via EDA software tools to see if it meets certain criteria. Verification involves DRC (Design rule check), LVS (Layout versus schematic), ERC (Electrical Rule Check), XOR (Exclusive OR), and Antenna Checks.
Read more about Physical Verification: XOR Check, Antenna Check, ERC (Electrical Rule Check)
Famous quotes containing the words physical and/or verification:
“Theory may be deliberate, as in a chapter on chemistry, or it may be second nature, as in the immemorial doctrine of ordinary enduring middle-sized physical objects.”
—Willard Van Orman Quine (b. 1908)
“Science is a system of statements based on direct experience, and controlled by experimental verification. Verification in science is not, however, of single statements but of the entire system or a sub-system of such statements.”
—Rudolf Carnap (1891–1970)