Phoebe (computer) - Development

Development

In November 1996, the design of what was to become Phoebe 2100 was started. The design took into account a number of perceived weaknesses of the Risc PC design, a slow memory architecture, limited I/O capability, limited expansion, and not adhering to industry standards. To overcome these weakness a number of design objectives were created; Harness the full potential of the StrongARM CPU, support multiple processors, add support for PCI expansion, offer the best possible graphics, run existing RISC OS applications and to provide enhanced RISC OS functionality. An additional design objective of reusing the same case as the Risc PC was dropped due to power supply requirements and electrical interference problems.

To provide for these new capabilities Acorn had to design two new support chips for the system;

• VIDC20R, a new revision of the VIDC20 video chip used in the Risc PC. Using a shrink of the process to 0.6 µm, a 100% performance increase was gained. Due to this being logically the same chip as the previous generation there would be no issues with software compatibility.

• IOMD2, the new IO chip had to support multiple processors, included message passing and multiple bus mastering, and was manufactured using a 0.35 µm process. Throughout development and prototyping the IOMD2 were developed on a large FPGA.

During 1997 and 1998 Acorn regularly took prototype and mock-up hardware to various Acorn computer shows, including Acorn World October 1997, Wakefield Acorn Spring Show May 1998 and the Acorn Southeast Show June 1998.

By May 1998 Acorn started to offer their 'Registered Developer' scheme members the chance to pre-order a pre-launch prototype for testing and development, these were offered at a £950 (ex VAT) a significant discount on the public price of £1500 (ex VAT) revealed in June.

On 15 September 1998, the first Phoebe 2100 motherboards with silicon (rather than FPGA) based IOMD2 chips were powered up. They successfully ran at the full front side bus speed of 64 MHz, and the improved performance of the video chip was also seen, however various bugs in the sound DMA were reported and general system instability was noted. As such, no shippable prototypes were yet available to send to the 'Registered Developers'.

Two days later, on 17 September 1998, the development of Phoebe 2100 was cancelled.

Development was expected to cost £2.1 million.