Oscillator Sync - Digital Implementation Aspects

Digital Implementation Aspects

Naive approaches to sync in digital oscillators will result in aliasing.

Methods such as additive synthesis, BLIT (Band limited Impulse Train) or BLEP (band-limited step) must be adopted to avoid aliasing.

In a digital oscillator, best practice is that the slave will not be reset to the identical phase each, but to a phase advanced by an equivalent time to the phase of the master at the reset. This prevents jitter in the slave frequency and provides truer synchronization.

For digital oscillators, Reversing Synch may less frequently generate aliasing. This effect may be naively implemented by measuring the zero axis crossings of the master oscillator and reversing the slope of the slave oscillator after every other crossing.

For digital implementation, note that none of the Threshold or Weak Sync methods actually synthesize the waveform in a way different from Hard Sync (rather, they selectively deactivate it).

Overlap sync is primarily a digital technique with simple implementation, such as used in FOF (An analog implementation could be a highly damped sine oscillator excited by the reset pulse.)