OCTART 8 Channel Communications Processor - Introduction

Introduction

The Octart board was Cromemco's second-generation, co-processing subsystem which interfaced eight serial channels and a bi-directional parallel port to a host S-100/IEEE-696 bus. A typical Octart application might consist of interfacing eight computer terminals to the host system.

Unlike earlier serial interface boards, which merely formatted and exchanged individual data characters, the Octart featured a sophisticated DUART communications circuit plus an independent Z80A processor with 64 KB bytes of memory. This enabled the Octart to:

  1. Perform all protocol and error-detection/recovery functions.
  2. Buffer large amounts of serial data.
  3. Pass only preprocessed data over the host bus using

interrupt-driven I/O.

This reduced the processing load on the host CPU and dramatically increased system throughput.

The Octart was a versatile serial subsystem. Under program control, it could switch its internal memory configuration from 16 KB bytes of ROM and 32 KB bytes of RAM to a full 64 KB bytes of RAM.

Thus the board can include a ROM bootstrap program which loads an application program, and then switches to 64 KB bytes of RAM for maximum buffer space. The eight serial channels could operate independently of one another in any of four modes: full duplex, auto echo, local loopback, and remote loopback.

Each channel can be programmed to automatic wake-up mode for multidrop applications.

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