Multi-level Cell

In electronics, a multi-level cell (MLC) is a memory element capable of storing more than a single bit of information.

MLC NAND flash is a flash memory technology using multiple levels per cell to allow more bits to be stored using the same number of transistors. In single-level cell (SLC) NAND flash technology, each cell can exist in one of two states, storing one bit of information per cell. Most MLC NAND flash memory has four possible states per cell, so it can store two bits of information per cell. This reduces the amount of margin separating the states and results in the possibility of more errors. Multi-level cells which are designed for low error rates are sometimes called enterprise MLC (eMLC).

The primary benefit of MLC flash memory is its lower cost per unit of storage due to the higher data density. However, software complexity can be increased to compensate for a larger bit error ratio. The higher error ratio requires an algorithm that can correct errors up to five bits and detect the condition of more than five bad bits. The most commonly used algorithm is Bose-Chaudhuri-Hocquenghem (BCH code). Other drawbacks of MLC NAND are lower write speeds, lower number of program-erase cycles and higher power consumption compared to SLC flash memory.

A few memory devices go the other direction, and use two cells per bit, to give even lower bit error rates.