Manchester Small-Scale Experimental Machine - Development and Design

Development and Design

Following his appointment to the Chair of Electrical Engineering at Manchester University, Williams recruited his TRE colleague Tom Kilburn on secondment. By the autumn of 1947 the pair had increased the storage capacity of the Williams tube from one bit to 2,048, arranged in a 64 by 32-bit array, and demonstrated that it was able to store those bits for four hours. Engineer Geoff Tootill joined the team on loan from TRE in September 1947, and remained on secondment until April 1949.

Max Newman had been appointed to the Chair of Pure Mathematics at Manchester University in 1945. During the Second World War he had worked as a cryptanalyst at Bletchley Park, and had led the team which in 1943 produced the first of the Colossus code-breaking computers. Although Newman played no active role in the development of the SSEM, or any of the subsequent Manchester computers, he was generally supportive and enthusiastic about the project, and arranged for the acquisition of war-surplus supplies for its construction, including GPO metal racks from Bletchley.

By June 1948 the SSEM had been built and was working. It was 17 feet (5.2 m) in length, 7 feet 4 inches (2.24 m) tall, and weighed almost 1 long ton (1.0 t). The machine contained 550 valves—300 diodes and 250 pentodes—and had a power consumption of 3500 watts. The arithmetic unit was built using EF50 pentode valves, which had been widely used during wartime. The SSEM used one Williams tube to provide 32 by 32-bit words of random-access memory (RAM), a second to hold a 32-bit accumulator in which the intermediate results of a calculation could be stored temporarily, and a third to hold the current program instruction along with its address in memory. A fourth CRT, without the storage electronics of the other three, was used as the output device, able to display the bit pattern of any selected storage tube.

Each 32-bit word of RAM could contain either a program instruction or data. In a program instruction, bits 0–12 represented the memory address of the operand to be used, and bits 13–15 specified the operation to be executed, such as storing a number in memory; the remaining 16 bits were unused. The SSEM's single operand architecture meant that the second operand of any operation was implicit: the accumulator or the program counter (instruction address); program instructions specified only the address of the data in memory.

A word in the computer's memory could be read, written, or refreshed, in 360 microseconds. An instruction took four times as long to execute as accessing a word from memory, giving an instruction execution rate of about 700 per second. The main store was refreshed continuously, a process which took 20 milliseconds to complete, as each of the SSEM's 32 words had to be read and then refreshed in sequence.

The SSEM represented negative numbers using two's complement, as most computers still do. In that representation, the value of the most significant bit denotes the sign of a number; positive numbers have a zero in that position and negative numbers a one. Thus the range of numbers that could be held in each 32-bit word was −231 to +231 − 1 (decimal: −2,147,483,648 to +2,147,483,647).