Intel Memory Model - Memory Segmentation

Memory Segmentation

Four registers are used to refer to four segments on the 16-bit x86 segmented memory architecture. DS (data segment), CS (code segment), SS (stack segment), and ES (extra segment). Another 16-bit register can act as an offset into a given segment, and so a logical address on this platform is written segment:offset, typically in hexadecimal notation. In real mode, in order to calculate the physical address of a byte of memory, one left-shifts the contents of the appropriate register 4 bits, and then adds the offset.

For example the logical address 7522:F139 yields the 20-bit physical address:

Note that this process leads to aliasing of memory, such that any given physical address may have multiple logical representations. This means that comparison of pointers in different segments is a complicated process.

In protected mode, the GDT and LDT are used for this purpose.

Since segments refer to successive 16-byte areas of memory, 16 bytes is known as a "paragraph".