Example
Typical trace output from simulation by monitoring program used for test & debugging:
Program offset instruction Dis-assembled register/ storage (after execution) TEST001 000000 X'05C0' BALR R12,0 R12=002CE00A 000002 X'47F0C00E' BC 15,X'00C'(R12) 00000E X'98ECD00C' STM R14,R12,X'00C'(R13) X'002E0008' ==> X'00004CE,002CE008,..etc....' 000012 X'45E0C122' BAL R14,X'122'(R12) R14=002C0016 SUB1 000124 X'50E0C28A' ST R14,X'28A'(R12) X'002CE294' ==> X'002C0016' etc...Read more about this topic: Instruction Set Simulator
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