HP Superdome - Architecture (SX1000 Version)

Architecture (SX1000 Version)

A building block is a cell, a card holding 4 processors and memory. Superdome has a ccNUMA architecture, which means that processors have shorter access times for their cell's memory but longer access times for other cell's memories, and data items are allowed to be replicated across individual cache memories but are kept coherent with one another by cache coherence hardware mechanisms. In this case, a directory-based coherency mechanism is employed.

A center of each cell is an ASIC called cell controller (CC), that connects to four processor sockets (providing an average of 1.6 GB/s of bandwidth per socket), to four local memory subsystems, and to the backplane. The CC itself contains a crossbar, and four CCs interconnect via a second-level crossbar. In maximum machine's configuration four second-level crossbars interconnect with each other, supporting in total 64 processor sockets.

Each socket may hold either a single-core PA-RISC processor (PA-8600 or PA-8700), or a dual-core PA-RISC processor (PA-8800 or PA-8900), a single-core Itanium 2 processor, two Itanium 2 processors (using the mx2 module), or one dual-core Itanium 2 processor. There are almost no architectural differences between PA-RISC and Itanium versions of Superdome.