Architecture
The 600 series used 36-bit words and 18-bit addresses. They had two 36-bit accumulators, eight 18-bit index registers, and one 8-bit exponent register. It supported floating point in both 36-bit single-precision and 2 x 36-bit double precision, the exponent being stored separately, allowing up to 71 bits of precision (one bit being used for the sign). It had an elaborate set of addressing modes, many of which used indirect words, some of which were auto-incrementing or auto-decrementing. It supported 6-bit and 9-bit bytes through addressing modes; these supported extracting specific bytes, and incrementing the byte pointer, but not random access to bytes.
It also included a number of channel controllers for handling I/O. The CPU could hand off short programs written in the channel controller's own machine language, which would then process the data, move it to or from the memory, and raise an interrupt when they completed. This allowed the main CPU to move on to other tasks while waiting for the slow I/O to complete, a primary feature of time sharing systems.
Read more about this topic: GE-600 Series
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