Burroughs B1700 - Internals

Internals

One concession to the fact that Burroughs was primarily a supplier to business (and thus running COBOL) was the availability of BCD arithmetic in the ALU.

Internally the machines employed 16-bit instructions and a 24-bit data path. The bit addressable memory supported the mix quite efficiently. Internally, the later generation memories stored data on 32-bit boundaries, but were capable of reading across this boundary and supplying a merged result.

The initial hardware implementations were built out of the CTL Family originally made by Fairchild Semiconductor but with the introduction of the B1955 in 1979 the series employed the more popular (and more readily obtainable) TTL logic family. Up through the B1955, the control logic was implemented with PROMs, muxes and such.

The B1965, the last of the series, was implemented with a pair of microcode sequencers which stayed in lock step with each other. The majority of the instructions executed in a single cycle. This first cycle was decoded by FPLAs using 16 inputs (just the perfect size for a 16-bit instruction word) and 48 min-terms. Successive cycles from a multi-cycle instruction were sourced from PROMs. The FPLAs and PROM outputs were wired together. The FPLA would drive the output on the first cycle, then get tri-stated. The PROMs would drive the control lines until the completion of the instruction.