Registers
The Atari 8-bit computers and the Atari 5200 console map the ANTIC chip to the $D4xxhex page.
Hardware registers do not return the written values back when read. This problem is solved by Operating System Shadow registers implemented in regular RAM as places to store the last value written to registers. Operating System Shadow registers are copied from RAM to the hardware registers during the vertical blank. Therefore any writes to hardware registers which have corresponding shadow registers will be overwritten by the value of the Shadow registers during the next vertical blank.
Some Write hardware registers do not have corresponding Shadow registers. They can be safely written by an application without the value being overwritten during the vertical blank. If the application needs to know the last state of the register then it is the responsibility of the application to remember what it wrote.
Operating System Shadow registers also exist for some Read registers where reading the value directly from hardware at an unknown stage in the display cycle may return inconsistent results.
| Name | Description | Read/Write | Hex Addr | Dec Addr | Shadow Addr Name | Shadow Addr Hex | Shadow Addr Dec |
|---|---|---|---|---|---|---|---|
| DMACTL | Direct Memory Access Control | Write | $D400 | 54272 | SDMCTL | $022F | 559 |
| CHACTL | Character Control | Write | $D401 | 54273 | CHART | $02F3 | 755 |
| DLISTL | Display List Pointer (low byte) | Write | $D402 | 54274 | SDLSTL | $0230 | 560 |
| DLISTH | Display List Pointer (high byte) | Write | $D403 | 54275 | SDLSTH | $0231 | 561 |
| HSCROL | Horizontal Fine Scroll | Write | $D404 | 54276 | |||
| VSCROL | Vertical Fine Scroll | Write | $D405 | 54277 | |||
| PMBASE | Player/Missile Base Address | Write | $D407 | 54279 | |||
| CHBASE | Character Set Base Address | Write | $D409 | 54281 | CHBAS | $02F4 | 756 |
| WSYNC | Wait for Horizontal Sync | Write | $D40A | 54282 | |||
| VCOUNT | Vertical Line Counter | Read | $D40B | 54283 | |||
| PENH | Light Pen Horizontal Position | Read | $D40C | 54284 | LPENH | $0234 | 564 |
| PENV | Light Pen Vertical Position | Read | $D40D | 54285 | LPENV | $0235 | 565 |
| NMIEN | Non-Maskable Interrupt (NMI) Enable | Write | $D40E | 54286 | |||
| NMIRES | Non-Maskable Interrupt (NMI) Reset | Write | $D40F | 54287 | |||
| NMIST | Non-Maskable Interrupt (NMI) Status | Read | $D40F | 54287 |
In the individual register listings below the following legend applies:
- 0 = bit must be 0
- 1 = bit must be 1
- ? = bit may be either 0 or 1, and is used for a purpose.
- - = bit value is unused, or should not be expected to be a certain value
- label = See explanation for purpose of bits.
Read more about this topic: ANTIC
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