The advanced load address table (ALAT) is a functional unit in the Intel Itanium processor architecture. It is implemented with an associative memory. The ALAT is used to store information related to advance load instructions, as part of the speculative execution process.
An "advanced load" is a method aimed in reducing the latency of costly load operations. If there is a possibility that a data item will be required, the program may specify its advanced load, even before the confirmation that the item will be needed.
In the Itanium architecture, this advanced load order may be issued by an ld.a instruction. This instruction allocates an entry in the advanced load address table and starts the data transfer. The ALAT is used to identify the address from where the data will be read, the length of the required data block, the destination register and the state of the load operation. The success of the advanced load may then be checked with a ld.c or chk.a instruction that looks for the related information in the ALAT.
The ALAT in the original Itanium processor was implemented by a two-way set-associative memory with 32 entries. In the Itanium 2, this unit was changed to a 32 entries fully associative structure. This design required extra hardware elements (longer memory tags, and more tag comparators) but it improved performance of speculative programs since cache miss due to mapping conflicts is avoided.
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