VHDL-AMS - Code Example

Code Example

In VHDL-AMS, a design consists at a minimum of an entity which describes the interface and an architecture which contains the actual implementation. In addition, most designs import library modules. Some designs also contain multiple architectures and configurations.

A simple ideal diode in VHDL-AMS would look something like this:

-- (this is a VHDL comment) library IEEE; use IEEE.math_real.all; use IEEE.electrical_systems.all; -- this is the entity entity DIODE is generic (iss : current := 1.0e-14; -- Saturation current af : real := 1.0; -- Flicker noise coefficient kf : real := 0.0); -- Flicker noise exponent port (terminal anode, cathode : electrical); end entity DIODE; architecture IDEAL of DIODE is quantity v across i through anode to cathode; constant vt : voltage := 0.0258; -- Thermal voltage at 300 K begin i == iss * (exp(v/vt) - 1.0); end architecture IDEAL;

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