Statistical Static Timing Analysis
Conventional static timing analysis (STA) has been a stock analysis algorithm for the design of digital circuits over the last 30 years. However, in recent years the increased variation in semiconductor devices and interconnect has introduced a number of issues that cannot be handled by traditional (deterministic) STA. This has led to considerable research into statistical static timing analysis, which replaces the normal deterministic timing of gates and interconnects with probability distributions, and gives a distribution of possible circuit outcomes rather than a single outcome.
Read more about Statistical Static Timing Analysis: Why STA Is Popular, Limits of Conventional STA, Methods of SSTA, Criticism of SSTA, Tools That Perform Static Timing Analysis, See Also
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