Registered Memory

Registered Memory

Registered (also called buffered) memory modules have a register between the DRAM modules and the system's memory controller. They place less electrical load on the memory controller and allow single systems to remain stable with more memory modules than they would have otherwise. Registered memory is often more expensive because of the lower volume and the additional components, so it is usually found only in applications where the need for scalability and stability outweighs the need for a low price (servers, for example). Although most server-grade memory modules are both ECC and registered, there are also both registered non-ECC modules and non-registered ECC modules. Non-registered ECC memory is supported and used in motherboards which do not support the very large amounts of memory used by servers.

Nominally, there is a performance penalty for using registered memory. Each read or write is buffered for one cycle between the memory bus and the DRAM, so the registered RAM can be thought of as running one clock cycle behind the equivalent unregistered DRAM. With SDRAM, this only applies to the first cycle of a burst.

However, this performance penalty is not universal. There are other factors involved in memory access speed. For example, the Intel "Westmere" 5600 series of processors access memory using interleaving, wherein memory access is distributed across 3 channels. If 2 memory DIMMs are used per channel, this "...results in a reduction of maximum memory bandwidth for 2DPC (DIMMs per channel) configurations with UDIMM by some 5% in comparison to RDIMM." (p. 14). This is because "...when you go to 2 DIMMs per memory channel, due to the high electrical loading on the address and control lines, the memory controller use something called a “2T” or “2N” timing for UDIMMs. Consequently every command that normally takes a single clock cycle is stretched to two clock cycles to allow for settling time. Therefore, for two or more DIMMs per channel, RDIMMs will have lower latency and better bandwidth than UDIMMs."