The method of logical effort, a term coined by Ivan Sutherland and Bob Sproull in 1991, is a straightforward technique used to estimate delay in a CMOS circuit. Used properly, it can aid in selection of gates for a given function (including the number of stages necessary) and sizing gates to achieve the minimum delay possible for a circuit.
Read more about Logical Effort: Derivation of Delay in A Logic Gate, Procedure For Calculating The Logical Effort of A Single Stage, Multistage Logic Networks
Famous quotes containing the words logical and/or effort:
“The sensual and spiritual are linked together by a mysterious bond, sensed by our emotions, though hidden from our eyes. To this double nature of the visible and invisible world—to the profound longing for the latter, coupled with the feeling of the sweet necessity for the former, we owe all sound and logical systems of philosophy, truly based on the immutable principles of our nature, just as from the same source arise the most senseless enthusiasms.”
—Karl Wilhelm Von Humboldt (1767–1835)
“Our decision about energy will test the character of the American people and the ability of the President and the Congress to govern this nation. This difficult effort will be the “moral equivalent of war,” except that we will be uniting our efforts to build and not to destroy.”
—Jimmy Carter (James Earl Carter, Jr.)