The method of logical effort, a term coined by Ivan Sutherland and Bob Sproull in 1991, is a straightforward technique used to estimate delay in a CMOS circuit. Used properly, it can aid in selection of gates for a given function (including the number of stages necessary) and sizing gates to achieve the minimum delay possible for a circuit.
Read more about Logical Effort: Derivation of Delay in A Logic Gate, Procedure For Calculating The Logical Effort of A Single Stage, Multistage Logic Networks
Famous quotes containing the words logical and/or effort:
“The contention that a standing army and navy is the best security of peace is about as logical as the claim that the most peaceful citizen is he who goes about heavily armed. The experience of every-day life fully proves that the armed individual is invariably anxious to try his strength. The same is historically true of governments. Really peaceful countries do not waste life and energy in war preparations, with the result that peace is maintained.”
—Emma Goldman (1869–1940)
“But the effort, the effort! And as the marrow is eaten out of a man’s bones and the soul out of his belly, contending with the strange rapacity of savage life, the lower stage of creation, he cannot make the effort any more.”
—D.H. (David Herbert)