Static Verification (Analysis)
Static verification is the process of checking that software meets requirements by doing a physical inspection of it. For example:
- Code conventions verification
- Bad practices (anti-pattern) detection
- Software metrics calculation
- Formal verification
Verification by Analysis - The analysis verification method applies to verification by investigation, mathematical calculations, logical evaluation, and calculations using classical textbook methods or accepted general use computer methods. Analysis includes sampling and correlating measured data and observed test results with calculated expected values to establish conformance with requirements.
Read more about this topic: Software Verification
Famous quotes containing the word verification:
“Science is a system of statements based on direct experience, and controlled by experimental verification. Verification in science is not, however, of single statements but of the entire system or a sub-system of such statements.”
—Rudolf Carnap (1891–1970)