Common Features
PICs typically have a common set of registers: Interrupt Request Register (IRR), In-Service Register (ISR), Interrupt Mask Register (IMR). The IRR specifies which interrupts are pending acknowledgement, and is typically a symbolic register which can not be directly accessed. The ISR register specifies which interrupts have been acknowledged, but are still waiting for an End Of Interrupt (EOI). The IMR specifies which interrupts are to be ignored and not acknowledged. A simple register schema such as this allows up to two distinct interrupt requests to be outstanding at one time, one waiting for acknowledgement, and one waiting for EOI.
There are a number of common priority schemas in PICs including hard priorities, specific priorities, and rotating priorities.
Interrupts may be either edge triggered or level triggered.
There are a number of common ways of acknowledging an interrupt has completed when an EOI is issued. These include specifying which interrupt completed, using an implied interrupt which has completed (usually the highest priority pending in the ISR), and treating interrupt acknowledgement as the EOI.
Read more about this topic: Programmable Interrupt Controller
Famous quotes containing the words common and/or features:
“There comes Poe, with his raven, like Barnaby Rudge,
Three-fifths of him genius, and two-fifths sheer fudge.
Who talks like a book of iambs and pentameters,
In a way to make people of common sense damn metres,
Who has written some things quite the best of their kind,
But the heart somehow seems all squeezed out by the mind.”
—James Russell Lowell (1819–1891)
“Each reader discovers for himself that, with respect to the simpler features of nature, succeeding poets have done little else than copy his similes.”
—Henry David Thoreau (1817–1862)