Modified Harvard Architecture - Comparisons

Comparisons

Three characteristics may be used to distinguish Modified Harvard machines from Harvard and Von Neumann machines:

• Instruction and data memories occupy different address spaces. For pure Harvard machines, there is an address 'zero' in instruction space that refers to an instruction storage location and a separate address 'zero' in data space that refers to a distinct data storage location. By contrast, Von Neumann and modified Harvard machines store both instructions and data in a single address space, so address 'zero' refers to only one thing and whether the binary pattern in that location is interpreted as an instruction or data is defined by how the program is written. This characteristic unambiguously identifies a pure Harvard machine.

By a strict interpretation of this distinction, for example, the Microchip PIC17 and PIC18 architectures, as well as the Atmel 8-bit AVR architecture, would be regarded as pure Harvard architecture machines because they do, in fact, maintain a distinct separation between code and data spaces, and address 'zero' of each does, in fact, refer to a physically different piece of memory. However, the distinction is made ambiguous by the colloquial use of the term "modified Harvard architecture" to refer to such machines' inclusion of special instructions to read and/or write the contents of code space as though it were data.

• Instruction and data memories have separate hardware pathways to the central processing unit (CPU). This is the point of pure or modified Harvard machines, and why they co-exist with the more flexible and general von Neumann architecture: separate memory pathways to the CPU allow instructions to be fetched and data to be accessed at the same time, improving throughput. The pure Harvard machines have separate pathways with separate address spaces. Modified Harvard machines have such separate access paths for CPU caches or other tightly coupled memories, but a unified address space covers the rest of the memory hierarchy. A Von Neumann processor has only that unified address space. From a programmer's point-of-view, a modified Harvard processor is usually treated as a Von Neumann machine until cache coherency becomes an issue, as with self-modifying code and program loading. This can be confusing, but such issues are usually visible only to systems programmers and integrators.

• Instruction and data memories may be accessed in different ways. The original Harvard machine, the Mark I, stored instructions on a punched paper tape and data in electro-mechanical counters. This, however, was entirely due to the limitations of technology available at the time. Today a Harvard machine such as the PIC microcontroller might use 12-bit wide flash memory for instructions, and 8-bit wide SRAM for data. In contrast, a Von Neumann microcontroller such as an ARM7TDMI, or a modified Harvard ARM9 core, necessarily provides uniform access to flash and SRAM (as 8 bit bytes, in those cases).