Mercury Computer Systems - Hardware

Hardware

Mercury hardware is generally about packing huge numbers of decently-fast processors into a tiny space while keeping power requirements tolerable. Many dozens of CPUs or even a few hundred CPUs will be packed into a space that is only a foot or two (half a meter) on each side. Vector math and IO performance are strongly emphasized.

Mercury product offerings span three generations of switched fabric technology.

• RACEway is Mercury's original interconnect fabric. RACEway uses 6-way crossbar chips organized in a fat tree network. RACEway is circuit switched, with circuit setup and teardown being performed automatically as a chip-by-chip operation done by the hardware. There are four priority levels, with high-priority circuit setup able to kill existing lower-priority circuits. RACEway primarily uses 27 bits of 3-bit-per-hop source routing, with the added ability to specify that crossbars may choose the less-congested route under certain circumstances. There is a "broadcast" ability that operates as a flood-fill. Each CPU node, called a "CE", has the ability to map the memory of up to 14 other nodes and has a mailbox for incoming messages. Node-to-node strided DMA is available, for example allowing every third column of a matrix to be transmitted. RACEway is 32 bits wide. It always operates at 40 MHz. Heterogeneous shared-memory products were offered with the Intel i860, SHARC, and PowerPC.
• RACE++ is Mercury's second interconnect fabric. It is very similar to the original RACEway, and in fact can be set into a compatibility mode for connection to RACEway devices. RACE++ offers a 66 MHz native mode that is not compatible with the older hardware. Crossbars examine 5 bits of the 27-bit route, then shift out a configurable 3, 4 (typical), or 5 bits. The all-1-bit address is reserved to address a crossbar itself for discovery and configuration; the older RACEway crossbars are not configurable or discoverable. RACE++ crossbars typically have 8 ports. Because the chips are configurable, localized broadcast addresses can be made available.
• RapidIO is the current switch fabric. It is a serious departure from the older technology, though bridging between the two types of fabric is possible with dedicated conversion chips. RapidIO was designed in cooperation with Motorola (now Freescale). It is a reliable packet switched network that uses point-to-point links and chip-to-chip handshaking reservations to avoid dropping packets. Packets are 256 bytes, with 8-bit (most non-Mercury devices) or 16-bit addresses. Crossbars throughout the multicomputer contain local routing tables so that packets need not be source-routed.

Recently, Mercury announced a partnership with IBM to bring the Cell to embedded applications in the defense, medical, and demanding commercial fields.