Memory-mapped I/O - Complete and Incomplete Address Decoding

Complete and Incomplete Address Decoding

Addresses may be decoded completely or incompletely by a device.

• Complete decoding involves checking every line of the address bus, causing an open data bus when the CPU accesses an unmapped region of memory. (Note that even with incomplete decoding, decoded partial regions may not be associated with any device, leaving the data bus open when those regions are accessed.)

• Incomplete decoding, or partial decoding, uses simpler and often cheaper logic that examines only some address lines. Such simple decoding circuitry might allow a device to respond to several different addresses, effectively creating virtual copies of the device at different places in the memory map. All of these copies refer to the same real device, so there is no particular advantage in doing this, except to simplify the decoder (or possibly the software that uses the device). This is also known as address aliasing; Aliasing has other meanings in computing. Commonly, the decoding itself is programmable, so the system can reconfigure its own memory map as required, though this is a newer development and generally in conflict with the intent of being cheaper.