IBM 1401 - Architecture

Architecture

Each alphanumeric character in the 1401 was encoded by six bits, called B,A,8,4,2,1. The B,A bits were called zone bits and the 8,4,2,1 bits were called numeric bits, terms taken from the IBM 80 column punched card.

• For digits 1 through 9, the bits B,A were zero, the digit BCD encoded in bits 8,4,2,1. Digit 0 was encoded 8,2.
• For alphabetic characters the setting of bits was derived from the zone and digit punches of the IBM 80 column punched card character code: B,A from 12, B from 11, and A from 0; the setting of bits 8,4,2,1 from BCD encoding of the 1 through 9 punches. Thus the letter A, 12,1 in the punched card character code, was encoded B,A,1.
• Encodings of punched card characters with two or more digit punches can be found in the Character and Op codes table.

IBM called the 1401's character code BCD, even though that term describes only the decimal digit encoding. The 1401's alphanumeric collating sequence was compatible with the punched card collating sequence.

Associated with each memory location were two other bits, called C for odd parity check and M for word mark.

Each memory location then, had the following bits:

C B A 8 4 2 1 M

The 1401 was available in six memory configurations: 1.4K, 2K, 4K, 8K, 12K, or 16K locations. A very small number of 1401s were expanded to 32K by special request. Each memory location was addressable, addresses were 0 through 15999.

Some operations used specific memory locations (those locations were not reserved and could be used for other purposes). Read a card stored the 80 columns of data from a card into memory locations 001-080. Index registers 1, 2 and 3 were in memory locations 087-089, 092-094 and 097-099 respectively. Punch a card punched the contents of memory locations 101-180 into a card. Write a line printed the contents of memory locations 201-332.

The 1401's instruction format was

Opcodes were one character. Memory addresses ("I" a branch target, "A" and "B" data) and unit address were three characters. The opcode modifier was one character. Instruction length was then 1, 2, 4, 5, 7, or 8 characters. Most instructions had to be followed by a word mark (a requirement commonly met by the word mark with the opcode of the next instruction).

See Character and Op codes for a list of operations.

A three character memory address in an instruction was an encoding of a five character memory address. The three low order digits of the five character address, 000 to 999, were specified by the numeric bits of the three characters. The zone bits of the high-order character specified an increment as follows: A 1000, B 2000, B and A together 3000, giving an addressability of 4,000 memory locations. The zone bits of the low-order character specified increments of 4000, 8000, or 12000, to address 16,000 memory locations (with an IBM 1406 Storage Unit). For example, the three character address "I99" was a reference to memory location 3000 + 999, or 3999.

The zone bits of the middle character of a three character memory address specified index registers, one of many optional features.

Operands referenced by the A-address and B-address were: a single memory location, a variable length field, or a variable length record. Variable length fields were addressed at their loworder position, their length defined by a word mark set at their highorder position. The only limit on the length of such fields was the available memory. Instructions applicable to variable length fields included: Add, Subtract, Multiply, Divide, Compare, Move Characters to A or B Word Mark, Move Characters and Edit. One or more adjacent variable length fields could make up a variable length record. A variable length record was addressed at its highorder position, its length defined by a group-mark character with a word mark or a record-mark character in its loworder position. The instruction Move Characters to Record or Group Mark could be used to assemble a block of records. A variable length record, or block of records, to be written to magnetic tape was addressed at its highorder position, its length defined by a group-mark character with a word mark immediately following its loworder position.

A sequence of operations on adjacent fields could be "chained", using the addresses left in the address registers by the previous operation. For example, addition of adjacent data fields might be coded as "A 700,850", "A 695,845", "A 690,840". With chaining, this could be coded as "A 700,850", "A", "A" - omitting data address from the 2nd and 3rd instructions.