GIO was later expanded to a 64-bit form, GIO64, retroactively renaming the earlier version GIO32. Addressing remained 32-bit but now allowed for both big-endian and little-endian addressing as indicated by a new control pin, whereas GIO32 only supported the SGI-style big-endian addresses. Data could now be transferred 64-bits at a time thereby doubling speed. GIO64 could also be run faster than GIO32, up to 40 MHz, providing a maximum streaming throughput of 320 Mbyte/s. The page sizes were also adjusted to allow for the changing CPU's, starting at 4 kbyte for R3000 based machines, and up to 16 Mbyte for R4400 based ones.
Physically the GIO64 bus used much larger cards that were generally similar in size and layout to EISA cards, a deliberate choice that made development somewhat easier as well as allowing SGI to place EISA slots in the same machines. Specifically the external connector (the metal flange) was identical to EISA, but the shape of the board itself was slightly different.
Two versions of GIO64 were specified. The "non-pipelined" system worked in a fashion similar to that of GIO32, with transfers being set up directly on the bus. The newer "pipelined" system was what the actual boards used, and as the name implies the system set up transfers in a several-step operation that was decoded in the controller's internal pipeline. Internally the non-pipelined bus transferred data between the various parts of the computer, including GIO cards, EISA devices, SCSI and so forth. GIO cards used the pipelined controller to arbitrate and control timing, the data then being fed into main memory via the internal non-pipelined side.
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