CR0
The CR0 register is 32 bits long on the 386 and higher processors. On x86-64 processors in long mode, it (and the other control registers) is 64 bits long. CR0 has various control flags that modify the basic operation of the processor.
Bit | Name | Full Name | Description |
---|---|---|---|
31 | PG | Paging | If 1, enable paging and use the CR3 register, else disable paging |
30 | CD | Cache disable | Globally enables/disable the memory cache |
29 | NW | Not-write through | Globally enables/disable write-back caching |
18 | AM | Alignment mask | Alignment check enabled if AM set, AC flag (in EFLAGS register) set, and privilege level is 3 |
16 | WP | Write protect | Determines whether the CPU can write to pages marked read-only |
5 | NE | Numeric error | Enable internal x87 floating point error reporting when set, else enables PC style x87 error detection |
4 | ET | Extension type | On the 386, it allowed to specify whether the external math coprocessor was an 80287 or 80387 |
3 | TS | Task switched | Allows saving x87 task context only after x87 instruction used after task switch |
2 | EM | Emulation | If set, no x87 floating point unit present, if clear, x87 FPU present |
1 | MP | Monitor co-processor | Controls interaction of WAIT/FWAIT instructions with TS flag in CR0 |
0 | PE | Protected Mode Enable | If 1, system is in protected mode, else system is in real mode |
Read more about this topic: Control Register, Control Registers in X86 Series