Bulldozer (microarchitecture)

Bulldozer (microarchitecture)

Bulldozer is Advanced Micro Devices' (AMD) Central Processing Unit (CPU) codename for the server and desktop processors released on 12 October 2011 with family 15h microarchitecture, the successor to the family 10 h (K10) microarchitecture M-SPACE design methodology.

Bulldozer is designed from scratch, not a development of earlier processors. The core is specifically aimed at 10–125 watt TDP computing products. AMD claims dramatic performance-per-watt efficiency improvements in high-performance computing (HPC) applications with Bulldozer cores.

The Bulldozer cores support most of the instruction sets implemented by Intel processors available at its introduction (including SSE4.1, SSE4.2, AES, CLMUL, and AVX) as well as new instruction sets proposed by AMD (XOP and FMA4).