Architectural Features
PRISM was a "pure" 32-bit design, including thirty-two 32-bit integer and thirty-two 64-bit floating point registers (overlaid by sixty-four 32-bit registers). PRISM could dispatch a single integer or one integer and one floating point instruction per clock cycle. The floating-point instruction could, in turn, combine a floating-point add and multiply in a single instruction. The compiler attempted to always pair (or triple) instructions up to maintain full use of the internal units, but if it failed to find a safe pair it simply fed in a single integer instruction. PRISM was one of the first designs to include a multiply with add/subtract/truncate in a single (five operand) instruction, so it was often described as a three-issue CPU.
Read more about this topic: Apollo PRISM
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