Using With MATLAB
Verilator converts synthesizable Verilog to C++, while C++ library could be compiled into MEX file using MATLAB interface to C++. This is how Verilog designs can be directly simulated from MATLAB. Using compiled C++ models with MATLAB is faster than using co-simulation interface with separate HDL simulator. There is an open-source project vmodel that compiles Verilog into MEX file using Verilator, and provides a set of functions for model simulation from MATLAB.
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