Architecture
TURBOchannel is a 32-bit address and data multiplexed bus, clocked at frequencies between 12.5 to 25 MHz, with a maximum theoretical usable bandwidth of 90 MB/s. The bus however differs from others at the time by having point to point control lines. The firmware contained within TURBOchannel cards is MIPS machine code, a remnant of the bus' original use in MIPS-based systems. Because of this, later systems that used this bus such as the Alpha-based DEC 3000 AXP used an emulator contained in its system firmware to properly initialize them.
| Clock frequency | Maximum theoretical bandwidth | Sustained bandwidth (using DMA) | Sustained bandwidth (using PIO) |
|---|---|---|---|
| 12.5 MHz | 50 MB/s | ? | ? |
| 22.5 MHz | 90 MB/s | ? | ? |
| 25.0 MHz | 100 MB/s | 90 MB/s | ? |
The TURBOchannel is a synchronous, asymmetrical I/O channel. It is asymmetrical in the sense that option modules (Digital terminology for expansion card) can communicate with the system module (Digital terminology for motherboard) and not with other option modules.
A simple protocol is used to make TURBOchannel efficient. The TURBOchannel bus does not permit bus mastering, if a TURBOchannel connected device wishes to communicate with another, it must first transfer this information to the memory so the other device can read it. The TURBOchannel protocol specifies that each option has its own physical address space. This address space is used to address registers and memory on the option. The maximum amount specified is 16 GB, although each implementation can have an amount anywhere below this amount. Digital's own systems used anywhere from 4 MB (for early DECstation 5000s) to 128 MB in high-end DEC 3000 AXP models.
The TURBOchannel bus uses a 32-bit data and address multiplexed bus for transferring data and addresses. Every TURBOchannel option slot has its own set of seven point-to-point control lines and five lines for universal control and arbitration. The point-to-point control lines are connected directly to the TURBOchannel interface. The TURBOchannel interface was not defined in the TURBOchannel specification, although Digital introduced three possible schemes and an example ASIC. The three possible schemes were divided into a low-cost, a mid-range and high performance system implementations. The system can either time-multiplex multiple option slots in order to use a single memory port to share its bandwidth or dedicate a memory port to each option slot.
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