3DS (three dimensional stack) is a new IC packaging technology which uses the die stacking technique.
The digital electronics market requires a higher density semiconductor memory chip in order to cater to recently released CPU components, and the multiple die stacking technique has been suggested as a solution to this problem. JEDEC disclosed the upcoming DRAM technology includes the "3DS" die stacking plan at "Server Memory Forum", November 1–2, 2011, Santa Clara, CA.
3DS devices utilize Through-silicon via (TSV) technology for interconnect between dies. JEDEC is planning to start 3DS for current DDR3 for testing in advance of full production on DDR4.
Read more about this topic: Three-dimensional Integrated Circuit