SIR-2 - Electronics

Electronics

The control unit of SIR-2 is based on a System-on-a-chip design, minimizing the size and power consumption of the unit. A central component is the radiation hardened RTAX2000S Axcelerator FPGA, containing a LEON (LEON3FT) SPARC compliant CPU, communications interface Intellectual property cores, and custom interfaces to the rest of the instrument.

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