Architecture
The Challenge is a shared-memory multiprocessor computer. The system is based on nodes, which are implemented as boards that plug into a midplane containing Ebus slots and the POWERpath-2 "Ebus" bus, a system bus that the nodes use to communicate with other nodes. The POWERpath-2 bus consists of a 256-bit path for data and a 40-bit path for addressing clocked at 47.6 MHz (21-nanosecond cycle), providing 1.2 GB/s of sustained bandwidth.
The midplane in DM and L models contains five Ebus slots that can support a combination of three CPU, one memory or two POWERchannel-2 interface boards. The midplane also contains five VME expansion slots.
The midplane in XL models contains fifteen Ebus slots that can support a combination of nine CPU, eight memory or five POWERchannel-2 interface boards. The midplane also contains six VME expansion slots and three power board slots.
Read more about this topic: SGI Challenge
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